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About this course
- Class Overview
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Syllabus & Downloads
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Introduction 2 min
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Introduction to Microchip FPGAs 20 min
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Introduction to Simulation 11 min
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LAB1: Simulation Lab 1 min
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Introduction to Debug 6 min
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LAB2: SmartDebug Lab 1 min
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Identify® from Synopsys® 2 min
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LAB3: Identify Lab 1 min
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Conclusion 1 min
- Complete Recording
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25018 FPGA7 (46 min)
25018 FPGA7: Simulation and Hardware Debugging for FPGA Designs (August 2025)
The class shows the use of simulation and debug tools within the Microchip Libero® SoC design tool flow and provides additional resources for further learning.
This is a recording of the course "25018 FPGA7: Simulation and Hardware Debugging for FPGA Designs" from the 2025 MASTERs Conference.
The class covers foundational knowledge and provides practical experience in FPGA simulation flows and hardware debugging techniques. The class includes a high-level introduction to Microchip® FPGA architecture, various simulation flows, testbench generation, and hands-on labs for both simulation and debugging. For simulation flow, the Siemens® QuestaSim™ simulation tool will be used. For debugging, the Microchip SmartDebug and Synopsys® Identify® debug tools will be used. The class shows the use of simulation and debug tools within the Microchip Libero® SoC design tool flow and provides additional resources for further learning.
Prerequisites:
Students should be familiar with the Libero FPGA design tool flow